- libc6 (>= 2.38)
- libffi8 (>= 3.4)
- libgmp10 (>= 2:6.3.0+dfsg)
- libnuma1 (>= 2.0.11)
- libyaml-0-2
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
synthesizable VHDL, Verilog, or SystemVerilog.
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Features of Clash:
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* Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
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* Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
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* Higher-order functions, with type inference, result in designs that are
fully parametric by default.
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* Synchronous sequential circuit design based on streams of values, called
@Signal@s, lead to natural descriptions of feedback loops.
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* Support for multiple clock domains, with type safe clock domain crossing.
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This package provides:
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* The CoreHW internal language: SystemF + Letrec + Case-decomposition
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* The normalisation process that brings CoreHW in a normal form that can be
converted to a netlist
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* Blackbox/Primitive Handling
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Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:
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*
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*
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Prelude library:
Installed Size: 59.8 MB
Architectures: amd64 arm64