netgen-lvs - 1.5.133-1.2+b1 main

Netgen is a tool for comparing netlists, a process known as LVS, which stands
for "Layout vs. Schematic". This is an important step in the integrated circuit
design flow, ensuring that the geometry that has been laid out matches the
expected circuit.
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Very small circuits can bypass this step by confirming circuit operation
through extraction and simulation. Very large digital circuits are usually
generated by tools from high-level descriptions, using compilers that ensure
the correct layout geometry. The greatest need for LVS is in large analog or
mixed-signal circuits that cannot be simulated in reasonable time.
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Note that the executable name in Debian is 'netgen-lvs'. For details, see
/usr/share/doc/netgen-lvs/README.Debian